Upgradeable/downgradeable central processing unit chip computer systems
US5761479A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 1995 |
| Grant date | Jun 2, 1998 |
| Priority date | — |
| Expiry date | Mar 31, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7864
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A single chip replacement upgradeable/downgradeable data processing system capable of operating with different types of central processing unit (CPU) chips. The system has a first socket for registration of a first CPU chip and a second socket for registration of a second CPU chip. Circuitry is provided for preventing possible signal contention between the first and second CPU chips and for synchronizing clocks for operating a CPU with the system clock. Circuitry is also provided for interfacing with a coprocessor associated with the different types of CPU chips as well as for adjusting the signals to and from the CPU chips to the signal width of the system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.