Method for PBLOCOS isolation between semiconductor devices
US5763317A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 26, 1996 |
| Grant date | Jun 9, 1998 |
| Priority date | — |
| Expiry date | Dec 26, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method for the isolation between active regions of a semiconductor device. The method provides an poly buffered local oxidation of silicon(PBLOCOS) technology. In this method, a non-doped polysilicon layer and the overlying amorphous silicon layer are used as a buffer layer. To form a field oxide region for isolation between semiconductor devices, first a pad oxide film, the buffer layer, silicon nitride layer are formed on a semiconductor substrate. Thereafter, patterning is performed to expose the pad oxide film at a selected region. Lastly, thermal oxidation is performed, thereby the exposed pad oxide is grown to form the field oxide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.