Two-gate flat display screen
US5764204A · kind A · utility
5Cited by
7References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 19, 1996 |
| Grant date | Jun 9, 1998 |
| Priority date | — |
| Expiry date | Mar 19, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J31/127
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A flat display screen includes a cathode arranged in columns for electronically bombarding an anode including phosphor elements, a first gate arranged in rows to be individually addressed, and a second gate formed by at least two combs of alternate paths parallel with the rows of the first gate. A same row of the first gate is associated with a path of each comb and the interconnection of each path with a cathode column defines a screen pixel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.