Fault tolerant output stage for digital two-conductor bus data communication system
US5765031A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 5, 1996 |
| Grant date | Jun 9, 1998 |
| Priority date | — |
| Expiry date | Feb 5, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/40273
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The invention provides a fault tolerant output stage for a digital two-conductor bus data communication system of the type having a transmission module and a reception stage which contains a bus signal intermediate processing module and a reception module connected downstream that conditions incoming bus signals for a data processing unit which is connected downstream. A state detection module is connected to the bus lines to detect a short-circuit between the bus lines, in which case the transmission module can be switched over between a difference mode of operation and a single-wire mode of operation under the control of the state detection module. The intermediate processing module is configured to condition the bus signals for the reception module automatically or under the control of the state detection module, both in the case of fault free bus lines and in the case of an interruption or short-circuit to the high or low supply voltage of one of the two bus lines and in the case of a short-circuit of the two bus lines to one another.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.