Video processing technique using multi-buffer video memory
US5767863A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 3, 1996 |
| Grant date | Jun 16, 1998 |
| Priority date | — |
| Expiry date | Sep 3, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B27/105
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a preferred embodiment, when full-motion video data is to be captured on a hard disk, a full-motion video memory on a video controller card has its addresses segmented into four groups, where each group can store one scaled-down frame (or field) of video data. The video memory is arranged to effectively act as a four-frame, first-in first-out (FIFO) buffer. The holding time of a single frame of data (i.e., four times the conventional holding time) in the video memory is sufficient to allow for the unpredictable variations in the hard drive timing so that frames are not arbitrarily dropped by worst case timing/accessing times of the hard drive. Hence, the average bandwidth and timing of the hard drive, rather than the instantaneous worst case bandwidth and timing of the hard drive, is used when designing the system. Additionally, video data may be read from and written into the same frame area in the video memory as long as the read (capture) and write (video-in) pointers have been determined to not overlap while accessing the same frame area. This more efficiently utilizes the capabilities of the hard drive.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.