Phase matched reset for digital micro-mirror device
US5768007A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 11, 1996 |
| Grant date | Jun 16, 1998 |
| Priority date | — |
| Expiry date | Sep 11, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N2005/7466
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of resetting the mirrors (11, 21) of the mirror elements of a digital micro-mechanical device (DMD) (10, 20). A bias voltage is applied to the mirror elements and the surface upon which they land, but is removed after the address voltage has been switched. (FIG. 4). Immediately before the bias is removed, a reset voltage is added to the bias voltage. The reset voltage signal is comprised of a number of pulses at a frequency that matches the resonant frequency of the mirrors. The magnitude of the reset voltage results in a total applied voltage that permits vibrational energy to build but that is insufficient to cause the mirrors to become unstuck until the end of the reset signal. In other words, the magnitude of the reset voltage is small relative to that of the bias voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.