Arrangement for testing a gate oxide
US5770947A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 27, 1996 |
| Grant date | Jun 23, 1998 |
| Priority date | — |
| Expiry date | Mar 27, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2884
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A circuit arrangement has an integrated monocrystaline semiconductor power component having a gate, a first measuring pad, a second measuring pad, and a resistor arranged so that the gate of the power component is connected with the first measuring pad while the first measuring pad is connected with the resistor, the first measuring pad being charged with a gate test voltage which is greater than a gate voltage required for operation of the power component, the power component being integrated with an integrated circuit on a chip, the integrated circuit being connected with the second measuring pad, while the second measuring pad is connected with the resistor, the second measuring pad being charged with an external voltage which is compatible with the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.