Current comparator with intrinsic limitation of absorption to the lowest current level
US5770954A · kind A · utility
4Cited by
7References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 9, 1996 |
| Grant date | Jun 23, 1998 |
| Priority date | — |
| Expiry date | Oct 9, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/2472
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and a respective circuit arrangement capable of markedly limiting the absorption of current by a current comparator circuit. The invention consists in limiting the absorption of current through the branch of the comparator circuit, along which is forced the highest current to the value of the lowest current, which is in turn forced through the other branch of the comparator circuit. This condition is obtained without interfering in any way with other characteristics of switching speed and sensitivity of the comparator circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.