Periodic waveform generating circuit
US5770958A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 1, 1997 |
| Grant date | Jun 23, 1998 |
| Priority date | — |
| Expiry date | Apr 1, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/36
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A first partial circuit is formed by grounding the emitter electrode of a first negative differential resistive element, connecting the emitter electrode of a second negative differential resistive element to the collector electrode of the first negative differential resistive element, and connecting a first field-effect transistor in parallel with the first negative differential resistive element. A second partial circuit is formed by grounding the emitter electrode of a third negative differential resistive element, connecting the emitter electrode of a fourth negative differential resistive element to the collector electrode of the third negative differential resistive element, and connecting a second field-effect transistor in parallel with the third negative differential resistive element. An output from the first partial circuit is input to the input of the second partial circuit. The inversion of the output of the second partial circuit is input to the input of the first partial circuit. A clock signal and a signal whose phase is opposite to that of the clock signal are applied to the collector electrodes of the second and fourth negative differential resistive elements, res…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.