Sampled amplitude read channel employing interpolated timing recovery and a remod/demod sequence detector
US5771127A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 1996 |
| Grant date | Jun 23, 1998 |
| Priority date | — |
| Expiry date | Jul 29, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/1426
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a computer disk storage system for recording binary data, a sampled amplitude read channel comprises a sampling device for asynchronously sampling pulses in an analog read signal from a read head positioned over a disk storage medium, interpolated timing recovery for generating synchronous sample values, and a sequence detector for detecting the binary data from the synchronous sample values. The sequence detector comprises a demodulator for detecting a preliminary binary sequence which may contain bit errors, a remodulator for remodulating to estimated sample values, a means for generating sample error values, an error pattern detector for detecting the bit errors, an error detection validator, and an error corrector for correcting the bit errors. The remodulator comprises a partial erasure circuit which compensates for the non-linear reduction in amplitude of a primary pulse caused by secondary pulses located near the primary pulse. The error pattern detector comprises a peak error pattern detector and, if an error pattern is detected, a means for disabling the error pattern detector until the detected error pattern has been fully processed. The error detection validator check…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.