Bit line reference circuit for a nonvolatile semiconductor memory device
US5771192A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 1996 |
| Grant date | Jun 23, 1998 |
| Priority date | — |
| Expiry date | Jul 26, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bit line reference circuit for a nonvolatile semiconductor memory device performs a referenced data access operation using a single bit line having upper and lower portions. The circuit has an open bit line structure and includes an upper memory cell string connected to the upper portion of the bit line, and a lower memory cell string connected to the lower portion of the bit line. An upper reference cell string is connected to the upper bit line for providing a reference potential to the upper bit line in response to a first control signal, while the lower memory cell string is selected. A lower reference cell string is connected to the lower bit line for providing a reference potential to the lower bit line in response to a second control signal, while the upper memory cell string is selected. A page buffer is connected between the upper and lower portions of the bit line and accesses data by comparing the potentials on the upper and lower portions of the bit line. Each reference cell string includes two transistors connected in series between the respective portion of the bit line and ground. The reference cell transistors are fabricated with the same process and structure as …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.