Bridge having a data buffer for each bus master
US5771359A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 1995 |
| Grant date | Jun 23, 1998 |
| Priority date | — |
| Expiry date | Oct 13, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4059
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bridge for coupling two buses together utilizes a data buffer to act as a point of synchronization to provide effective data operations between the buses. The bridge includes master and slave capability on both buses and an arbiter for selecting between requests from bus masters on one bus. The data buffer includes a number of dual ported memories for write posting and read ahead operations. Each dual ported memory is allocated to a bus master of the one bus. The bridge allows data operations to each dual ported memory based on data or space availability of the memory. Simultaneous reading and writing capability on alternate buses is provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.