Digital clock recovery loop
US5774022A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Aug 29, 1996 |
| Grant date | Jun 30, 1998 |
| Priority date | — |
| Expiry date | Aug 29, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/707
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A communications system including a clock recovery circuit that extracts a clock signal from incoming digital data, the clock recovery circuit including a voltage controlled oscillator having a control node and having an output producing an output wave having a frequency that varies in response to a voltage applied to the control node; charge pump and loop filter circuitry that controls the rate of change of the voltage on the control node of the voltage controlled oscillator; a start-up circuit that performs frequency detection and, in conjunction with the charge pump and loop filter circuitry, adjusts the voltage on the control node of the voltage controlled oscillator; and a state machine that performs phase detection and adjusts the voltage on the control node of the voltage controlled oscillator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.