Integrated circuit with multiple functions sharing multiple internal signal buses according to distributed bus access and control arbitration
US5774684A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 1996 |
| Grant date | Jun 30, 1998 |
| Priority date | — |
| Expiry date | Oct 8, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/368
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) includes multiple circuits and functions which share multiple internal signal buses, three physical and five logical, according to distributed bus access and control arbitration. The multiple internal signal buses are shared among three tiers of internal circuit functions: a central processing unit and a DMA controller; a DRAM controller and a bus interface unit; and peripheral interface circuits, such as PCMCIA and display controllers. Two of the physical buses correspond to two of the logical buses and are used for communications within the IC. The third physical bus corresponds to three of the logical buses and is used for communications between the IC and circuits external to the IC. Arbitration for accessing and controlling the various signal buses is distributed both within and among the three tiers of internal circuit functions. Maximum performance is thereby achieved from the circuit functions accessed most frequently, while still achieving high performance from those circuit functions accessed less frequently. The IC may provided with a processor core with features that support In-Circuit Emulation (ICE).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.