Central processing unit detecting and judging whether operation result executed by ALU in response to a first instruction code meets a predetermined condition
US5774687A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 1995 |
| Grant date | Jun 30, 1998 |
| Priority date | — |
| Expiry date | Jun 7, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30181
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A central processing unit in a microprocessor, or the like, executes at high speed a simple program and sets a different immediate depending on a true or false state of a predetermined condition. In the central processing unit, the first and second immediates are set in the instruction code, which is prefetched by an instruction queue. Depending on whether a value of one or zero is stored in the zeroflag, which corresponds to the true or false state of the predetermined condition, the first or second immediate is written into an address location of the register or the memory designated by the same instruction code.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.