Dual oscillator clock pulse generator
US5774705A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 12, 1996 |
| Grant date | Jun 30, 1998 |
| Priority date | — |
| Expiry date | Dec 12, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer/disk storage system enables data to be transferred between a memory and either one of a pair of buses. The system includes a pair of logic networks. The first logic network enables data to be transferred between the memory and a first one of the buses in response to a first bus availability signal. The first logic network also provides a second bus availability signal indicating when the memory is available to transfer data between such memory and the second one of the buses. A second logic network enables data to be transferred between the memory and the second one of the buses in response to the second bus availability signal. The second logic network also provides the first bus availability signal indicating when the memory is available to transfer data between such memory and the second one of the buses. A clock pulse generator has a pair of oscillators for producing clock pulses from one of the pair of oscillators. When one of the pair of oscillators becomes defective, clock pulses are produced from the other one of the pair of oscillators. The network includes a multiplexer having: a first input fed a first one of the pair of oscillators; a second input fed the oth…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.