Mother board with auxiliary conductors in parallel with power connectors
US5777276A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 26, 1996 |
| Grant date | Jul 7, 1998 |
| Priority date | — |
| Expiry date | Jul 26, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/0979
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Motherboard 10M receives a voltage at post 14P from an off-board power source. Buried conductive layer 10B selectively distributes this electrical power to component sites 10S. Post bore 14 penetrates through local electrodes 12U and 12L into the motherboard for exposing post contact regions 14U and 14L and post contact region 14B in the buried layer. Connector post 14P is positioned within the post bore. Post bore conductor 14C within the post bore establishes electrical continuity from the connector post to the buried layer. The post bore conductor also establishes electrical continuity from the connector post to post contact regions 14U and 14L in the local electrodes. Auxiliary bore 16 proximate the post bore penetrates into the motherboard for exposing auxiliary contact regions 16U and 16L in the local electrodes, and auxiliary contact region 16B in the buried layer. Auxiliary bore conductor 16C within the auxiliary bore establishes electrical continuity along the auxiliary bore. Each auxiliary bore provides an upper circuit and lower auxiliary circuit in parallel relationship between the connector post and the buried layer for reducing the electrical resistance into the burie…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.