Semiconductor device having improved alignment marks
US5777392A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 28, 1996 |
| Grant date | Jul 7, 1998 |
| Priority date | — |
| Expiry date | Mar 28, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a semiconductor device including a plurality of chip areas arranged in a matrix and a grid-like scribe areas a plurality of L-shaped alignment segments and a plurality of pairs of I-shaped alignment segments are provided within the scribe area. Each of the L-shaped alignment segments is located within a first quadrant defined by an X direction center line and a Y direction center line of the scirbe area, and each pair of the I-shaped alignment segments is located within a second quadrant defined by the X direction center line and the Y direction center line adjacent to the first quadrant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.