Integrated circuit I/O node useable for configuration input at reset and normal output at other times
US5777488A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 19, 1996 |
| Grant date | Jul 7, 1998 |
| Priority date | — |
| Expiry date | Apr 19, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1732
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention provides a method and system in which a single pin coupled to an integrated circuit (IC) chip is used to enter configuration information at a power-up time or a reset time (collectively referred to herein as a "reset time" or "reset interval"), and is also used to display output information during normal operation. The pin is coupled to a memory device, so as to store configuration information received during the reset interval. The pin is also coupled to an output driver controlled by a gate which combines output data with a signal indicating reset time, so as to put the output driver into a high impedance state during reset time when the input configuration data is being stored into the device and to drive the pin with the output value during non-reset times. Thus, a user of the IC may cause the memory to receive configuration information from the pin at power-up or during another reset time, while having the pin output normal data at times other than the reset interval.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.