Address transition detector circuit
US5777492A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 1996 |
| Grant date | Jul 7, 1998 |
| Priority date | — |
| Expiry date | Jun 17, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/18
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In an ATD circuit, a pulse width amplifier circuit is provided between a first circuit means and a second circuit means. The first circuit means generates a first output signal having a first pulse width in response to a change in external address signal and generates, when the external address signal becomes a first sawtooth signal, a second sawtooth output signal having a peak value smaller than that of the first sawtooth signal. The second circuit means receives therein the signal generated by the pulse width amplifier circuit and waveform-shapes the output signal so as to provide an ATD signal therefrom. The pulse width amplifier circuit amplifies a pulse width of the signal generated by the first circuit means. Further, the pulse width amplifier circuit generates a third output signal having a second pulse width corresponding to the first pulse width when the first output signal is received thereto and generates a fourth output signal having a third pulse width when the second output signal is received thereto.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.