Multiple clock source generation with independently adjustable duty cycles
US5777500A · kind A · utility
24Cited by
7References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 16, 1996 |
| Grant date | Jul 7, 1998 |
| Priority date | — |
| Expiry date | Jan 16, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Independent functional units are clocked by a clock source generator having at least two adjustable delay lines for independently adjusting the duty cycles of at least two clocks so that speed path margins are individually optimized for each functional unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.