Method and apparatus for measuring performance of a computer bus
US5778194A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 8, 1996 |
| Grant date | Jul 7, 1998 |
| Priority date | — |
| Expiry date | Apr 8, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/88
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for a method for measuring performance of an I/O bus. The method includes the steps of (a) determining a number of I/O bus clock cycles that occur during I/O bus transactions involving a peripheral device during a time period, and (b) determining a bus performance value for the I/O bus based on the number of I/O bus clock cycles determined in step (a). One embodiment of the apparatus includes a mechanism for determining a bus utilization value for the I/O bus based on the number of I/O bus clock cycles counted by the counter. Another embodiment of the apparatus includes a mechanism for determining a bus efficiency value for the I/O bus based on the number of I/O bus clock cycles counted by the counter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.