Blocking address enable signal from a device on a bus
US5778199A · kind A · utility
8Cited by
18References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 26, 1996 |
| Grant date | Jul 7, 1998 |
| Priority date | — |
| Expiry date | Apr 26, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1433
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method or apparatus of blocking access to a first device via a bus carrying an address enable signal in a computer system. A second device detects appearance of predetermined bus address information, and the address enable signal is blocked from the first device if the predetermined bus address information is present. A third device connected to the bus and the first device both are responsive to the predetermined bus address information, which includes bus addresses having upper bits with a non-zero value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.