Methods and structure to maintain a two level cache in a RAID controller and thereby selecting a preferred posting method
US5778426A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 1995 |
| Grant date | Jul 7, 1998 |
| Priority date | — |
| Expiry date | Oct 23, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/312
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and associated data structures operable in a RAID subsystem to improve I/O performance. A two level cache data structure and associated methods are implemented with a RAID controller. The lower level cache comprises buffers holding recently utilized blocks of the disk devices. The upper level cache records which blocks are present in the lower level cache for each stripe in the RAID level 5 configuration. The upper level cache serves to reduce the overhead processing required of the RAID controller to determine which blocks are present in the lower level cache. Having more rapid access to this information by lowering the processing overhead enables the present invention to rapidly select between different write techniques to post data and error blocks from low level cache to the disk array. A RMW write technique is used to post data and error checking blocks to disk when insufficient information reside in the lower level cache. A faster Full Write technique (also referred to as Stripe Write) is used to post data and error checking blocks to disk when all required, related blocks are resident in the lower level cache. The Full Write technique reduces the total number of I/O …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.