Multilayer coating for microelectronic devices
US5780163A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 1996 |
| Grant date | Jul 14, 1998 |
| Priority date | — |
| Expiry date | Jun 5, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/31678
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a protective covering on an electronic or microelectronic device to prevent inspection. A first silica-containing ceramic layer is applied to the surface of the device to planarize its surface. A second silicon carbide coating layer is applied to the surface of the first silica-containing ceramic layer to form a hermetic barrier. A third porous silica-containing ceramic layer is formed on the surface of the second silicon carbide coating layer. The third porous silica-containing ceramic layer is impregnated with an opaque material or filler. A fourth metal layer or metal pattern is applied over the third opaque porous silica-containing ceramic layer. The fourth metal layer or pattern is then coated with a fifth layer similar to the third opaque porous silica-containing ceramic layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.