Power-up detector for low power systems
US5781051A · kind A · utility
11Cited by
5References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 26, 1996 |
| Grant date | Jul 14, 1998 |
| Priority date | — |
| Expiry date | Jul 26, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/223
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power-up reset detector circuit is described which uses the threshold voltages of NMOS and PMOS transistors to detect the power-up of integrated circuits, and uses a current mirror to track power supply and process variations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.