Semiconductor memory device having block write function
US5781493A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 22, 1996 |
| Grant date | Jul 14, 1998 |
| Priority date | — |
| Expiry date | Nov 22, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device is provided with a first data line pair, second data line pair, a plurality of first bit line pairs respectively connected to the first data line pair through a plurality of first transfer gates, a plurality of second bit line pairs respectively connected to the second data line pair through a plurality of second transfer gates, a plurality of column select lines respectively connected commonly to one first transfer gate and one second transfer gate. A decoder circuit is supplied with an input address and block write signal for activating simultaneously at least two column select lines regardless of the input address while the block write signal is activated, and for activating the column select line corresponding to the input address while the block write signal is inactivated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.