Methods of simulating an electronic circuit design and forming an integrated circuit
US5781760A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 1995 |
| Grant date | Jul 14, 1998 |
| Priority date | — |
| Expiry date | Nov 16, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
During an electronic circuit simulation, an input file is generated that has source code and stimulus sections. Each of the source code and stimulus sections includes linking portions that each link a portion of the source code to a portion of the stimulus sections. The input file is processed to generate object code and a stimulus file that includes linking portions. The linking portions of the stimulus file allow events to occur that are synchronized with the object code during the running of a simulation program. The linking between the stimulus file and the object code is synchronized because the stimulus file is generated from the input file that has the linking portions. The linking remains synchronized even if the input file is modified. After a simulation, masks (30, 40, 50, 60, 70) can be generated and used to form an integrated circuit (20).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.