Integrated circuit devices including shallow trench isolation
US5783476A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 26, 1997 |
| Grant date | Jul 21, 1998 |
| Priority date | — |
| Expiry date | Jun 26, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76232
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for forming a silicon oxide-filled shallow trench on the active surface of a silicon chip starts with forming a trench in the silicon chip that has an upper portion with vertical side walls and a lower portion with tapered side walls. Then oxygen is implanted selectively into the walls of the lower portion of the trench and the chip is heated to react the implanted oxygen with the silicon to form silicon oxide. The rest of the trench is then filled with deposited silicon oxide, typically by depositing a layer of silicon oxide over the surface and then planarizing the deposited silicon oxide essentially to the level of the top of the trench. The silicon-filled shallow trench serves to divide the surface portion of the chip into discrete regions, each for housing one or more circuit components of an integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.