Bootstrap circuit and integrated memory circuit having the bootstrap circuit
US5783962A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 8, 1996 |
| Grant date | Jul 21, 1998 |
| Priority date | — |
| Expiry date | Jul 8, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bootstrap circuit includes a transfer transistor and a driver transistor of the same channel type each having two channel terminals and a gate. A first signal terminal receives a first signal and a second signal terminal receives a second signal. One of the channel terminals of the transfer transistor is connected to the gate of the driver transistor. The other of the channel terminals of the transfer transistor is connected to the first signal terminal. One of the channel terminals of the driver transistor is connected to the second signal terminal. The other of the channel terminals of the driver transistor forms an output of the bootstrap circuit. A configuration generates a third signal and has an output connected to the gate of the transfer transistor. The second signal has an edge extending from a first level to a second level and beginning at a bootstrap time. The first signal has a precharging level between the first level and the second level of the second signal occurring no later than another time being at the latest equal to the bootstrap time. After the other time, the third signal has a first level being equal to or located on the other side of the level of the firs…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.