Video processor implementing various data translations using control registers
US5784076A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 14, 1997 |
| Grant date | Jul 21, 1998 |
| Priority date | — |
| Expiry date | Aug 14, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N5/14
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Advantage is taken of Very Large Scale Integrated (VLSI) circuit design and manufacture to provide, in a digital data handling system handling display signal streams, a video processor which is capable of high performance due to vector processing and special addressing modes. A single VLSI device has a plurality of processors which cooperate for generating video signal streams and which employ distinctive addressing modes for memory elements of the device. Each of the plurality of processors has associated instruction and data caches, and the processors are joined together by a wide data bus formed on the same substrate as the processors. Each processor has a load/store unit, a translation unit associated with the load/store unit, and an index control register for controlling any translation of data bit streams passed through the load/store unit. The presence and operation of the translation unit enables the device to efficiently process data streams of varying types, thereby broadening the applicability of the device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.