Method for measuring electronic devices under test with a network analyzer
US5784299A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Jan 28, 1997 |
| Grant date | Jul 21, 1998 |
| Priority date | — |
| Expiry date | Jan 28, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R27/28
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
For measuring electronic devices under test with a network analyzer, the electronic devices to be embedded into a linear auxiliary network during their operation, as well as, during the measurement. First, system error correction data is determined for the network analyzer according to a known calibration method by connecting calibration standards. Then, the characteristic data for the auxiliary network to be used is determined and is linked with the system error correction data to form new error correction simulation data. Finally, in the subsequent measurement of devices under test connected to the network analyzer, this error correction simulation data is appropriately considered with the algorithm for system error correction that is present in the network analyzer, so that an auxiliary network virtually connected to the device under test is simulated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.