Selectable checking of message destinations in a switched parallel network
US5786771A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 1993 |
| Grant date | Jul 28, 1998 |
| Priority date | — |
| Expiry date | Feb 12, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/00
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method and hardware apparatus provide a fault tolerant and flexible multi-stage network addressing scheme for transmitting a message with a header containing control bits for selecting from various destination checking functions to be performed. Upon arrival of the message at a node, destination checking is performed or not in response to the massage's header. If destination checking is not performed, or if destination checking is performed and indicates that the node is the desired destination for the message, the message is accepted. If destination checking is performed and indicates that the node is not the desired destination for the message, the message is rejected. Destination checking is disabled during address assignment, broadcasting and multi-casting, and replaced with one's complement-based verification of the sending node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.