Basic cell for an electric double layer capacitor
US5786981A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 19, 1997 |
| Grant date | Jul 28, 1998 |
| Priority date | — |
| Expiry date | Feb 19, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E60/13
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A basic cell for an electric double layer capacitor has a pair of polarizing electrodes each including a plurality of chip electrodes arranged in matrix or honeycomb pattern. The plurality of chip electrodes are electrically connected by direct contact between each adjacent two chip electrodes for increasing the capacitance and decreasing the internal resistance. Excellent charging or discharging characteristic can be obtained even if the sheet collectors for providing charging or discharging current for the chip electrodes have different specific resistivities along the surface of the sheet collectors. The chip electrodes may be of a truncated pyramid shape for improving resistance against distorting or bending stress applied to the basic cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.