Loop-back test system and method
US5787114A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 17, 1996 |
| Grant date | Jul 28, 1998 |
| Priority date | — |
| Expiry date | Jan 17, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/243
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A loop back test system and method for providing local fault detection within the core or macrocell of an integrated I/O interface device on an integrated circuit is disclosed. The system and method of this invention is suitable for use in any I/O interface having both a transmitter and a receiver section. The loop back of input test data from the transmitters output directly to the receiver's input permits fault detection within the core of an integrated I/O interface. By illustration, in a serializer/deserializer I/O, the loop back of serialized, alignment pattern encoded parallel data from the output stage of the I/O transmitter to the receiver's input stage permits identifying faults occurring within the integrated I/O transceiver macrocell. The loop back test system and method of this invention permits fault isolation of within the boundaries of the I/O core and independent of external logic or testers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.