Viterbi decoding method and apparatus with balance among memory and processing requirements
US5787127A · kind A · utility
20Cited by
18References
9Claims
0Family size
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Key dates
| Filing date | Jul 22, 1996 |
| Grant date | Jul 28, 1998 |
| Priority date | — |
| Expiry date | Jul 22, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/4169
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A Viterbi decoding method and apparatus employ a path memory describing paths with a length of X.multidot.N branches, where N is a fixed positive integer, and X has a fixed value not less than two. One path is selected and retraced over its X.multidot.N branches, and the least recent (X-1).multidot.N branches are also traced forward and decoded; then the least recent (X-1).multidot.N branches of each path in the path memory are replaced with new path information. This process is repeated up to the end of the data to be decoded.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.