Software for producing instructions in a compressed format for a VLIW processor
US5787302A · kind A · utility
37Cited by
5References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 15, 1996 |
| Grant date | Jul 28, 1998 |
| Priority date | — |
| Expiry date | May 15, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3822
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Software creates a compressed instruction format for a VLIW processor which allows greater efficiency in use of cache and memory. Instructions are byte aligned and variable length. Branch targets are uncompressed. Format bits specify how many issue slots are used in a following instruction. NOPS are not stored in memory. Individual operations are compressed according to features such as whether they are resultless, guarded, short, zeroary, unary, or binary. Instructions are stored in compressed form in memory and in cache. Instructions are decompressed on the fly after being read out from cache.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.