Low power consumption mixer and frequency conversion with inter-terminal isolation for stable mixing
US5789963A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 4, 1997 |
| Grant date | Aug 4, 1998 |
| Priority date | — |
| Expiry date | Apr 4, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D7/125
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A low power consumption mixing circuit and process comprise first and second field effect transistors "FETs." The first and second FETs each have at least a control electrode and a drive electrode. The drive electrodes of the first and second FETs are coupled together by a capacitor. An AC signal is supplied to the control electrode of the first FET through a first matching circuit, and the first FET amplifies the AC signal. The capacitor removes the DC component from the amplified AC signal that appears at the drive electrode of the first FET. The amplified AC signal, which is free from the DC component, is provided to the drive electrode of the second FET. A second AC signal is supplied to the control electrode of the second FET by another matching circuit. The second FET mixes the first and second AC signals that are supplied to the drive electrode of the second FET. This mixed signal is then provided through an output matching circuit as a mixed output signal. A supply voltage is provided at the drive electrode of the first FET but no supply voltage is provided at the drive electrode of the second FET. Instead, a negative bias voltage is applied at the control electrode of the …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.