Multiple precharging semiconductor memory device
US5790466A · kind A · utility
Inventor
Key dates
| Filing date | Nov 27, 1996 |
| Grant date | Aug 4, 1998 |
| Priority date | — |
| Expiry date | Nov 27, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The semiconductor memory device of this invention includes a plurality of bit lines for carrying data read out from memory cells and supplying the data to a sense amplifier, the device including: a bias voltage generator for generating a first bias voltage and a second bias voltage which are different from each other; a first precharger for precharging at least one selected bit line to a first precharge voltage obtained based on the first bias voltage generated by the bias voltage generator; and a second precharger for preliminarily precharging each bit line to a second precharge voltage obtained based on the second bias voltage generated by the bias voltage generator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.