Operand prefetch table
US5790823A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 1995 |
| Grant date | Aug 4, 1998 |
| Priority date | — |
| Expiry date | Jul 13, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0862
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A operand prefetching mechanism is described for a system having a cache, in addition to its normal memory. The prefetch apparatus utilizes a table that records the location of each instruction that caused an operand miss and the location of the miss. Associated with this information is the address of each instruction fetch block that contains an instruction that caused an operand miss. The table is called an Operand Prefetch Table. With each instruction block fetched from the cache a search is made of the Operand Prefetch table to determine if the instructions found in this block previously caused operand misses. If the instruction block fetched matches an entry in the Operand Prefetch Table then a prefetch for future operands can be attempted for the instructions contained within the instruction block fetch segment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.