Power saving control system and method for use with serially connected electronic devices
US5790876A · kind A · utility
28Cited by
12References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 9, 1996 |
| Grant date | Aug 4, 1998 |
| Priority date | — |
| Expiry date | Feb 9, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system including a plurality of electronic devices connected together through a bus, which can realize reduction in power consumption while ensuring communications. When a bias voltage on an external bus is detected by a bias detecting circuit and a comparator, a bias voltage is output from a bias output terminal to the external bus enabling it. When a driver and receiver receive a PHY-SLEEP command through the external bus, the bias voltage put from the bias output terminal to the external bus is turned off disabling it.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.