Patent · US Expired

Parallel architecture for quantum computers using ion trap arrays

US5793091A · kind A · utility

68Cited by
2References
13Claims
0Family size

Assignee

Inventor

Key dates

Filing dateDec 13, 1996
Grant dateAug 11, 1998
Priority date
Expiry dateDec 13, 2016

Classification

  • Technology area (CPC B)Performing Operations; Transporting
  • CPC primaryB82Y10/00
  • WIPO fieldMicro-structural and nano-technology
  • WIPO sectorChemistry

Abstract

A parallel architecture of quantum logic gates and quantum communication channels is provided for a quantum computer, thereby achieving advantageous efficiency and computation speed. The architecture of the invention enables parallel memory operations on large quantum words, and permits the application, to the quantum case, of parallel algorithms for mathematical operations such as addition and multiplication. The invention also includes a novel apparatus for realizing parallel architecture using an array of miniature elliptical ion traps, with as many traps as there are bits in a quantum word. The ion trap array preferably uses an elliptical planar geometry, which can microfabricated by photolithography. Quantum information is transferred from one ion trap to another by either an optical coupling via a high finesse resonant cavity (photon coupling) or by electrostatic coupling of the ions' mechanical motion (phonon coupling).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.