Bit-serial digital expandor
US5793315A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 31, 1996 |
| Grant date | Aug 11, 1998 |
| Priority date | — |
| Expiry date | May 31, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G11/008
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A bit-serial digital expandor includes a bit-serial dual scaler block (340), a bit-serial rectifier block (320), a bit-serial lowpass wave digital filter block (350), a bit-serial scaler with overflow detection block (360), a bit-serial multiplier block (380), and a bit-serial scaler and clipper block (395). This bit-serial expandor can be used in an AMPS cellular telephone receiver to produce a receiver having a lower silicon area, gate count, and current drain compared to equivalent parallel architecture receivers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.