Null convention adder
US5793662A · kind A · utility
13Cited by
2References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 7, 1995 |
| Grant date | Aug 11, 1998 |
| Priority date | — |
| Expiry date | Jun 7, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/4822
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A NULL convention full adder receives a plurality of inputs, each having an asserted state and a NULL state. The adder switches its output to an asserted state when all inputs have been received and summed. The adder switches its output to the NULL state only after all inputs have returned to NULL. A register can be incorporated into each full adder. Multiple full adders are combined into multi-bit adders with registration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.