Method and system of updating graphics memory in a graphics display system through multiple address transferring of pixel data
US5794017A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 6, 1995 |
| Grant date | Aug 11, 1998 |
| Priority date | — |
| Expiry date | Feb 6, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The graphics display system comprises a data bus for transferring a set of application pixels, wherein a set consists of W number of blocks of data, and wherein each application pixel is M number of blocks. The graphics display system further comprises an address bus for transferring memory addresses, a graphics controller for outputting pixel data on the data bus at a rate of one set per memory clock cycle and for outputting one or more column addresses on the address bus for each set, and a graphics memory configured for a memory field size of N number of blocks such that an application pixel being stored is allocated N blocks. A set of application pixels is transferred over the data bus to the graphics memory, and, one or more column addresses are transferred over the address bus during the a memory clock cycle over the address bus. In addition, a row address is transferred to the graphics memory. Each block of the transferred set belongs to one of N/M groups of blocks, and each of these blocks are stored in the graphics memory in a memory field indicated by a transferred row and column address pair, wherein each group of blocks is stored at a different one of N/M number of colu…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.