Thermal limit circuit with built-in hysteresis
US5796280A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 5, 1997 |
| Grant date | Aug 18, 1998 |
| Priority date | — |
| Expiry date | Feb 5, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2017/0806
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A thermal shut down circuit with built-in temperature hysteresis, comprising first and second transistors configured as a bistable trigger circuit. The two transistors switch either a first or second emitter current through a bias resistor, thereby establishing a voltage hysteresis. By applying a reference voltage to the base of the first transistor, temperature dependent state transitions occur. A buffer transistor coupled to the collector of the second transistor allows the thermal shut down circuit to turn ON or OFF an auxiliary circuit. Thermal communication between the auxiliary circuit and the base-emitter junction of the first transistor allows the thermal shut down circuit to shut down the auxiliary circuit when the temperature exceeds a shutdown temperature, and thermal hysteresis built into the thermal shut down circuit prevents undesirable ON-OFF oscillation of the auxiliary circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.