Architecture for an expandable transaction-based switching bus
US5796732A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 1996 |
| Grant date | Aug 18, 1998 |
| Priority date | — |
| Expiry date | Mar 28, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/351
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A switching bus architecture enables efficient transfer of data within a network switch having a plurality of ports interconnected by a high-performance switching bus. The architecture is preferably implemented as novel port interface and forwarding engine circuitry that cooperate to efficiently transmit data to, and receive data from, the switching bus in accordance with a 2-tier arbitration policy that ensures adequate port access to the bus. As a result of such a cooperating arrangement, the architecture improves the transfer efficiency of the switch by providing all ports sufficient bus access to convey accurate data throughout the switch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.