Method for generating prefetch instruction with a field specifying type of information and location for it such as an instruction cache or data cache
US5796971A · kind A · utility
Inventor
Key dates
| Filing date | Aug 22, 1997 |
| Grant date | Aug 18, 1998 |
| Priority date | — |
| Expiry date | Aug 22, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6028
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method and system for providing for the prefetching of data or instructions. A prefetch instruction which is in an instruction stream is processed by memory management unit (MMU) where prefetch cache control information is placed as part of the already existing prefetch instruction. Once processed by the MMU, the prefetch instruction thus contains binary fields allowing the operating system or runtime software to control cache prefetching by assigning values to the binary fields which provide the optimal cache set location and the optimal amount of data to be prefetched and thus reduces thrashing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.