Method and system for increasing cache efficiency during emulation through operation code organization
US5796989A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 1, 1997 |
| Grant date | Aug 18, 1998 |
| Priority date | — |
| Expiry date | Aug 1, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/885
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An emulation system contains reorganized instruction code sequences for a computer, so that the native code which is used to emulate instructions that occur most frequently in a typical environment are grouped together, to thereby minimize instruction cache conflicts. A representative set of programs which operate with the emulated code are run, and statistics are recorded to determine the most frequently occurring emulated instructions. The native code which emulates these most frequently occurring instructions is then arranged so that the portions of the code are statically stored in main memory at consecutive memory locations. As a result, when the native code for a frequently occurring emulated instruction is loaded from the memory into the cache, the likelihood that the cache will contain the native code for subsequent emulated instructions is maximized, and the likelihood of cache conflicts is minimized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.