Intelligent loop unrolling
US5797013A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 1995 |
| Grant date | Aug 18, 1998 |
| Priority date | — |
| Expiry date | Nov 29, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/443
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A compiler facilitates efficient unrolling of loops and enables the elimination of extra branches from the loops, including the elimination of conditional branches from unrolled loops with early exits. Unrolling also enhances other optimizations, such as prefetch, scalar replacement, and instruction scheduling. The unroll factor is calculated to determine the amount of loop expansion and the optimum location to place compensation code to complete the original loop count, i.e. before or after the unrolled loop. The compiler is applicable, for example, to modern RISC architectures, where the latency of memory references and branches is higher than that of integer and floating point arithmetic instructions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.